This utility patches 060 MMU tables such that chip memory cachemode is
changed to Cache-Inhibited, Imprecise exception model, thus giving more
time for CPU between chip memory writes. Assembler sourcecode included.

New 68060.library (V42+) by Phase5 digital products set chipmem
cachemode already, so you only need this program if you have older
68060.library. There is also program called SetCacheMode by Phase5 that
can be used to change chip cachemode too.

This routine can be used for any purpose (for demos too, hehe:), but you
should give me some credit... (or? I don't think this is unreasonable).
Note that this patch needs to be started after SetPatch.

 Installation (as some ppl had problems (!) with this)
 ------------
Copy speedychip to c: and add "speedychip" line just after SetPatch to
s:startup-sequence. No need to run or >NIL:.

speedychip is Copyright © 1997 Harry "Piru" Sintonen <sintonenjyu.fi>.

 Latest beta releases plus some other programs by me can be found
 from http://www.jyu.fi/~sintonen/AmigaPrograms.html

 PERMSSN    UID  GID    PACKED    SIZE  RATIO     CRC       STAMP          NAME
---------- ----------- ------- ------- ------ ---------- ------------ -------------
-rw----r-- 18397/0         276     308  89.6% -lh5- 21e0 Nov  5  1997 speedychip
-rw----r-- 18397/0        1748    3466  50.4% -lh5- ce93 Nov 13  1997 speedychip.ASM
-rw-r--r-- 18397/0         718    1304  55.1% -lh5- b9e6 Nov 20  1997 speedychip.readme
---------- ----------- ------- ------- ------ ---------- ------------ -------------
 Total         3 files    2742    5078  54.0%            Nov 21  1997